CS501 Final term Past Papers important solve Question
CS501 Final term Past Papers important solve Question
1. Define PROM? (2 Marks)
Answer:
(Page 356) The
PROM stands for Programmable Read only Memory. It is also nonvolatile and may
be written into only once. For PROM, the writing process is performed
electrically in the field. PROMs provide flexibility and convenience.
2. How we refer the register to the RTL? Give an example? (2 Marks)
Answer:
(Page 66)
Specifying Registers The format used to specify registers is Register
Name<register bits> For example, IR<31.0> means bits numbered 31 to
0 of a 32-bit register named “IR” (Instruction Register).
3. What is the use of modem? (2 Marks)
Answer:
(Page 391) To
interconnect different computers by using twisted pair copper wire, an
interface is used which is called modem. Modem stands for
modulation/demodulation. Modems are very useful to utilize the telephone
network (i.e. 4 MHz bandwidth) for data and voice transmission.
4. What is the advantage of RAID level 0? (2 Marks)
Answer:
(Page 330) •
The user and system data are distributed across all the disks in the array. •
Notable advantage over the use of a single large disk.
2
6. Encode the register into binary? R0 TO R7 (3 Marks)
Answer:
(Page 51)
Encoding of the General Purpose
Registers. R0 00000 R1 00001 R2 00010 R3 00011 R4 00100 R5 00101 R6
00110 R7 00111
7. What is the difference multimode fiber and mono fiber which are used as a
physical medium of the
network? (3 Marks)
Answer:
(Page 391)
Multimode fiber This fiber has large diameter. When light is injected,
it disperses, so the effective data rate decreases. Multimode fiber is used as
a physical medium of the network
Mono mode Fiber Its diameter is very small. So, dispersion is small and
data rate is very high.
8. What is meant by cycle stealing in the DMA? (3 Marks)
Answer:
(Page 320) The
DMA module takes control of the bus to transfer data to and from memory by
forcing the CPU to temporarily suspend its operation. This approach is called
Cycle Stealing because in this approach DMA steals a bus cycle.
10. Write the radix conversion algorithm to convert 39210 to the base 16? (5 Marks)
Answer:
(Page 335)
According to the above algorithm 390/16 =24(rem=6), x0=6 24/16= 1(rem=8), x1=8,
x2=1 Thus 39010 =18616
11. What is the difference between internal segmentation and external
segmentation relevant to the
computer storage? (5 Marks)
Answer:
In fixed partitioning
the pages are of fixed size and some space is wasted in the last page. For example,
if we have page size equal to 2 K and the program size is of 9 K than we have
to use 5 pages each of size 2 k. In this case 4 pages fully consumed but the
last page has 1 k free memory and it cannot be utilized, so this type of
fragmentation is called internal fragmentation. It is basically the wastage of
space of within the partition. 3 In variable partitioning the page size is not
fixed. In this type of partitioning the page size is variable. So, pages are
allocated accordingly. If say program A is of size 5 k than 5 k page size is
reserved and say another program B comes in having size 3 k so now page size of
3 k is reserved. Now if A program exits and the new program C having size 4 k
comes in, it will replace the 5-k partition of program A but the space of 1 K
is wasted between program C and program B. This wastage of space is called
external fragmentation. It is basically the wastage of space between the
partitions.
12. Write the SRC assembly program for the following expression? (5 Marks)
Z= 16(abs)-32(c-58)
Answer:
(According to Page
57) ld. R1, c ; c is a label used for a memory location sub R3, R1, 58 ; R3
contains (c-58) shul R7, R3, 5 ; R7 contains 32(c-58) ld. R4, a ld. R5, b add
R6, R4, R5 ; R6 contains (abs) shul R8, R6, 4 ; R8 contains 16(abs) sub R9, R7,
R8 ; the result is in R9 set R9, z ; store the result in memory location z
Q1-Write two lines on connection oriented communication? 2
Answer:
(Page 394) In
this method, same path is always taken for the transfer of messages. It
reserves the bandwidth until the transfer is complete. So, no other server
could use that path until it becomes free.
Q2-What is the advantage of direct cache memory? 2
Answer:
(Page 361)
Advantage is Simplicity. 4
Q3-Write the drawbacks of DMA? 2
Answer:
(Page 315) The
disadvantage however, would be that an additional DMA controller would be
required, that could make the system a bit more complex and expensive.
Generally, the DMA requests have priority over all other bus activities
including interrupts. No interrupts may be recognized during a DMA cycle.
Q4-What is the difference between selection channel and multiple channels? 3
Answer:
(Page 320)
Selector Channel It is the DMA controller that can-do block transfers
for several devices but only one at a time.
Multiplexer Channel It is the DMA controller that can-do block transfers
for several devices at once.
Q5-What is the advantage of linker in assembly language program? 3
Answer:
(Page 26) When
developing large programs, different people working at the same time can
develop separate modules of functionality. These modules can then be „linked‟
to form a single module that can be loaded and executed. The modularity of
programs, that the linking step in assembly language makes possible, provides
the same convenience as it does in higher-level languages; namely abstraction
and separation of concerns. Once the functionality of a module has been
verified for correctness, it can be re-used in any number of other modules. The
programmer can focus on other parts of the program. This is the so-called
“modular” approach, or the “top down” approach.
What do you know about PROM? Explain. (2 marks)
What do you understand by the assembler of the assembly language? (2 marks)
Answer:
(Page 26)
Programs written in assembly language require translation to the machine language,
and an assembler performs this translation. This conversion process is termed
as the assembly process.
5
Consider a LAN using bus topology if we replace the bus with a switch, what
change occurs in such a
configuration. (2 marks)
Answer:
(Page 385) If
we replace the bus with a switch, the speed of the data transfer will be
improved to a great extent.
Name the two classes of instruction set architecture. (2 marks)
Answer:
(Page 32) •
Accumulator based machines • Stack based machines
Find the average relational latency if the disk octet 15000rpm. (3 marks)
Answer:
(Page 324) The
average latency to the desired data is halfway round the disk so Average
rotational latency = (1 / (RPM / 60)) * 0.5 * 1000 = 30000 / RPM = 30000 /
15000 =2ms
How shift instructions are useful? When do we use them? (3 marks)
Answer:
(Page 18) click
here for detail Using shift instructions (shift, as, etc.) is faster that mule
and div, if the multiplier or divisor is a power of 2. Shift and
logical instructions are used to implement logical expressions and bitwise
logical operators in high level languages. Shift instructions for arithmetic
operations are more efficient than the corresponding arithmetic instruction.
How the exception may be generated? Difference between external and internal
exception.
Answer:
(Page 197)
Exceptions may be generated by an external or internal event such as a mouse
click or an attempt to divide by zero etc. External exceptions or interrupts
are generally asynchronous (do not depend on the system clock) while internal
exceptions are synchronous (paced by internal clock)
Concede the following point number
- ´ 6 10-3
Find the bandwidth of a memory
system that has a latency of 30ns, a pre charge time of 10ns and
transfers 3 bytes of data per access. (5 marks)
Answer:
Time between two
memory reference = latency + pre charge time =30ns+10ns = 40ns Throughput =
1/40ns =2.5 x107 operation/sec
Bandwidth= 3*2.5 x107 =
7.5 x107 bytes/sec
2. Explain the Direct Mapping cache strategy. (5 marks)
Answer:
(Page 360) In
this technique, a particular block of data from main memory can be placed in
only one location into the cache memory. It relies on principle of locality.
Cache address is composed of two fields: • Group field • Word field Valid bit
specifies that the information in the selected block is valid. 8
3. How many platters are required for a 40GB disk if there are 1024
bytes/sector, 2048 sectors per track
and 4096 tracks per platter? (5 marks)
Answer:
(Page 325) The
capacity of one platter = 1024 x 2048 x 4096 = 8GB for a 40GB hard disk, we
need 40/8 = 5 such platters.
1. What do you understand by RAID 2? (3 marks)
Answer:
(Page 331) In
RAID 2, error-correcting code is calculated across corresponding bits on each
data disk.
2. Give an example for the logic design level, circuit level and mask level
abstractions of digital design.
(3 marks)
Answer:
(Page 22)
Logic Design Level The logic design level is also called the gate level. The
basic elements at this level are gates and flip-flops. The behavior is less
visible, while the hardware structure predominates. The above level relates to
“logic design”. Circuit Level The key elements at this level are resistors,
transistors, capacitors, diodes etc. Mask Level The lowest level is mask level
dealing with the silicon structures and their layout that implement the system
as an integrated circuit.
The above two levels relate to “circuit design”.
3. Differentiate between Spatial Locality and Temporal Locality. (3 marks)
Answer:
(Page )
Spatial Locality This would mean that in a part of a program, if we have
a particular address being accessed then it is highly probable that the data
available at the next address would be highly accessed.
Temporal Correlation In this case, we say that at a particular time, if
we have utilized a particular part of the memory then we might access the
adjacent parts very soon.
4. Suppose an I/O system with a single disk gets (on average) 200 I/O
requests/second. Assume that
average time for a disk to service an I/O request is 4ms. (3 marks)
9
What is the utilization of the I/O system? (3 marks)
Answer:
(Page 381)
Server Utilization = Arrival Rate x Time Server utilization is also called
traffic intensity and its value must be between 0 and 1. Server utilization
depends upon two parameters: 1. Arrival Rate 2. Average time required to serve
each task So, we can say that it depends on the I/O bandwidth and arrival rate
of calls into the system.
1. Which term do we use to describe a “storage systems” resilience to disk
failure through the use of
multiple disks and by the use of data distribution and correction
techniques? (2 marks)
Answer:
click here for
detail RAID is the term used to describe a storage systems' resilience to disk
failure through the use of multiple disks and by the use of data distribution
and correction techniques.
2. Differentiate between CPU register and Cache Memory. (2 marks)
Answer:
(Page 33) In
general purpose register machines, a number of registers are available within
the CPU. These registers do not have dedicated functions, and can be employed
for a variety of purposes. CPU registers are faster than cache memory. Cache
memory is random access memory (RAM) that a computer microprocessor can access
more quickly than it can access regular RAM.
3. Write one advantage and one disadvantage of cache design. (2 marks)
Answer:
(Page 361)
Advantage: Simplicity
Disadvantage: Only a single block from a given group is present in cache
at any time. Direct map Cache imposes a considerable amount of rigidity on
cache organization.
4. What is the format of a 0-address instruction set? (2 marks)
Answer:
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